static int vlapic_test_and_set_irr(int vector, struct vlapic *vlapic)
{
- vlapic->flush_tpr_threshold = 1;
return vlapic_test_and_set_vector(vector, vlapic->regs + APIC_IRR);
}
static void vlapic_set_irr(int vector, struct vlapic *vlapic)
{
- vlapic->flush_tpr_threshold = 1;
vlapic_set_vector(vector, vlapic->regs + APIC_IRR);
}
static void vlapic_clear_irr(int vector, struct vlapic *vlapic)
{
- vlapic->flush_tpr_threshold = 1;
vlapic_clear_vector(vector, vlapic->regs + APIC_IRR);
}
{
case APIC_TASKPRI:
vlapic_set_reg(vlapic, APIC_TASKPRI, val & 0xff);
- vlapic->flush_tpr_threshold = 1;
break;
case APIC_EOI:
}
}
else
- {
vlapic->disabled &= ~VLAPIC_SW_DISABLED;
- vlapic->flush_tpr_threshold = 1;
- }
break;
case APIC_ESR:
vlapic_set_reg(vlapic, APIC_SPIV, 0xff);
vlapic->disabled |= VLAPIC_SW_DISABLED;
- vlapic->flush_tpr_threshold = 1;
-
return 1;
}
{
int max_irr, tpr;
- /* Clear the work-to-do flag /then/ do the work. */
- vlapic->flush_tpr_threshold = 0;
- mb();
-
if ( !vlapic_enabled(vlapic) ||
((max_irr = vlapic_find_highest_irr(vlapic)) == -1) )
{
int highest_vector;
unsigned long eflags;
struct vcpu *v = current;
- struct vlapic *vlapic = vcpu_vlapic(v);
struct hvm_domain *plat=&v->domain->arch.hvm_domain;
struct periodic_time *pt = &plat->pl_time.periodic_tm;
unsigned int idtv_info_field;
hvm_set_callback_irq_level();
- if ( vlapic->flush_tpr_threshold )
- update_tpr_threshold(vlapic);
+ update_tpr_threshold(vcpu_vlapic(v));
has_ext_irq = cpu_has_pending_irq(v);
uint32_t timer_divisor;
struct timer vlapic_timer;
int timer_pending_count;
- int flush_tpr_threshold;
s_time_t timer_last_update;
struct page_info *regs_page;
void *regs;